5.6 PWM Inputs Pins
(Submit Feedback)ATA6847 has three input pins for PWM low: IL1 to IL3, which are active at a high logic level. For high side, there are three available pins, nIH1 to nIH3, which are active at a low logic level. This configuration is valid when the COMPEN bit in the GDUCR4 register is in the Low state (see GUDUCR4 Register).
When the COMPEN bit is set (High state), the complementary mode is selected. In this mode, the PWMs are applied only to the nIHx pins, and the ILx pins become enabling inputs for the corresponding PWM. See Table 5-1.
| GDUCR4.COMPEN = 0 (Direct Mode) | GDUCR4.COMPEN = 1 (Complementary Mode) | ||||
|---|---|---|---|---|---|
| Ilx | nIHx | GLx | GHx | GLx | GHx |
| Low | Low | 0 | 1 | - | - |
| Low | High | 0 | 0 | - | - |
| High | Low | x | x | 0 | 1 |
| High | High | 1 | 0 | 1 | 0 |
| - | Outputs are floating (disabled) |
| x | Outputs remain in previous state until dead time has expired |
| 0 | Output is in Low state |
| 1 | Output is in High state |