5.2.3.5 GDU Control Register 4

Name: GDUCR4
Offset: 0x08
Reset: 0x78
Property: R/W

Bit 76543210 
 COMPENVDHOVSDUVVGSENUVVGSLVLVGSUVFLT [3:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 01111000 

Bit 7 – COMPEN

Complementary Control Enable bit.
ValueDescription
1 The microcontroller will set this bit to ‘1’ if the complementary control of external MOSFETs is activated.
0 The microcontroller will set this bit to ‘0’ if the external MOSFETs are controlled individually (direct) with the six gate control input signals (NIHx and ILx).

Bit 6 – VDHOVSD

VDH Overvoltage Shutdown Enable bit.
ValueDescription
1 The microcontroller will set this bit to ‘1’ when a VDH overvoltage event triggers a shutdown of the VG and VCP regulator (triggers transition from GDU Normal mode to GDU Standby mode).
0 The microcontroller will set this bit to ‘0’ if a VDH overvoltage event will not trigger a shutdown of VG and VCP regulator.

Bit 5 – UVVGSEN

VGS Undervoltage Detection Enable bit. The bit enables/disables both VCP and VG monitoring.
ValueDescription
1 The microcontroller will set this bit to ‘1’ when VGS monitoring is active.
0 The microcontroller will set this bit to ‘0’ when VGS monitoring is not active.

Bit 4 – UVVGSLVL

VGS/VG Undervoltage Detection Level Selection bit.
ValueDescription
1 The microcontroller will set this bit to ‘1’ when the higher detection level (VVGS_UV_Set_H) is used.
0 The microcontroller will set this bit to ‘0’ when the lower detection level (VVGS_UV_Set_L) is used.

Bits 3:0 – VGSUVFLT [3:0]

VGS undervoltage filter time (tVGS_UV_Blank). The filter time can be configured as follows: 770 ns × N, N = 1 to 16 [0x0 to 0x0F]. Filter time starts after an undervoltage event has been detected (comparator output changes to high). If VG and VCP voltage rise above the detection threshold during filter time, filter time will be reset and it will be restarted after VGS undervoltage occurs again.