35.13 USART

Figure 35-3. USART in SPI Mode - Timing Requirements in Host Mode
Table 35-18. USART in SPI Host Mode - Timing Specifications
SymbolDescriptionMin.Typ.✝Max.UnitCondition
fSCK *SCK clock frequency——10MHz
TSCK *SCK period100——ns
tSCKWSCK high/low width—0.5×TSCK—ns
tSCKRSCK rise time—2.7—ns
tSCKFSCK fall time—2.7—ns
tMISMISO setup to SCK—10—ns
tMIHMISO hold after SCK—10—ns
tMOSMOSI setup to SCK—0.5×TSCK—ns
tMOHMOSI hold after SCK—1.0—ns

✝ Data in the “Typ.” column is at TA = 25°C and VDD = 3.0V unless otherwise specified. These parameters are not tested and are for design guidance only.

* These parameters are characterized but not tested in production.