4.2 CCC Locations and Clocking Capabilities
(Ask a Question)The following figure shows the CCC locations and their clocking capabilities. CCCs are labeled according to their locations in the device. For example, the CCC located in the northeast corner is labeled as CCC_NE.
The source clocks for a CCC can come from preferred clock inputs, high-speed I/O clocks, and FPGA fabric. A pair of reference clock inputs from an adjacent transceiver block is present at the CCC_SE. The CCC clock outputs are driven to the global buffers, transceiver as reference clocks, and high-speed I/O clock networks.
Note: For PolarFire SoC and RT PolarFire SoC
FPGAs, CCC_NW can generate reference clocks to MSS either from OUT2 or OUT3 clock
outputs.
