15.13.17 PIE5
| Name: | PIE5 |
| Offset: | 0xE2E |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| TMR8IE | TMR7IE | TMR6IE | TMR5IE | TMR4IE | TMR3IE | TMR2IE | TMR1IE | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 7 – TMR8IE TMR8 to PR8 Match Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | Enabled |
| 0 | Disabled |
Bit 6 – TMR7IE TMR7 to PR7 Match Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | Enabled |
| 0 | Disabled |
Bit 5 – TMR6IE TMR6 to PR6 Match Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | Enabled |
| 0 | Disabled |
Bit 4 – TMR5IE TMR5 to PR5 Match Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | Enabled |
| 0 | Disabled |
Bit 3 – TMR4IE TMR4 to PR4 Match Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | Enabled |
| 0 | Disabled |
Bit 2 – TMR3IE TMR3 to PR3 Match Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | Enabled |
| 0 | Disabled |
Bit 1 – TMR2IE TMR2 to PR2 Match Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | Enabled |
| 0 | Disabled |
Bit 0 – TMR1IE TMR1 to PR1 Match Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | Enabled |
| 0 | Disabled |