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15.13.28 IPR6
Peripheral Interrupt Priority Register| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | | | | | TMR7GIP | TMR5GIP | TMR3GIP | TMR1GIP | |
| Access | | | | | R/W | R/W | R/W | R/W | |
| Reset | | | | | 1 | 1 | 1 | 1 | |
Bit 3 – TMR7GIP TMR7 Gate Interrupt Priority
bit
| Value | Description |
|---|
| 1 |
High
priority |
| 0 |
Low
priority |
Bit 2 – TMR5GIP TMR5 Gate Interrupt Priority
bit
| Value | Description |
|---|
| 1 |
High
priority |
| 0 |
Low
priority |
Bit 1 – TMR3GIP TMR3 Gate Interrupt Priority
bit
| Value | Description |
|---|
| 1 |
High
priority |
| 0 |
Low
priority |
Bit 0 – TMR1GIP TMR1 Gate Interrupt Priority
bit
| Value | Description |
|---|
| 1 |
High
priority |
| 0 |
Low
priority |
