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15.13.31 IPR9
Peripheral Interrupt Priority Register 9| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | | | SMT2PWAIP | SMT2PRAIP | SMT2IP | SMT1PWAIP | SMT1PRAIP | SMT1IP | |
| Access | | | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | | | 1 | 1 | 1 | 1 | 1 | 1 | |
Bit 5 – SMT2PWAIP SMT2 Pulse Width Acquisition Interrupt
Priority bit
| Value | Description |
|---|
| 1 |
High
priority |
| 0 |
Low
priority |
Bit 4 – SMT2PRAIP SMT2 Period Acquisition Interrupt Priority
bit
| Value | Description |
|---|
| 1 |
High
priority |
| 0 |
Low
priority |
Bit 3 – SMT2IP SMT2 Interrupt Priority
bit
| Value | Description |
|---|
| 1 |
High
priority |
| 0 |
Low
priority |
Bit 2 – SMT1PWAIP SMT1 Pulse Width Acquisition Interrupt
Priority bit
| Value | Description |
|---|
| 1 |
High
priority |
| 0 |
Low
priority |
Bit 1 – SMT1PRAIP SMT1 Period Acquisition Interrupt Priority
bit
| Value | Description |
|---|
| 1 |
High
priority |
| 0 |
Low
priority |
Bit 0 – SMT1IP SMT1 Interrupt Priority
bit
| Value | Description |
|---|
| 1 |
High
priority |
| 0 |
Low
priority |
