LAN8670/1/2

7.6.10 Wake-up Signal Characteristics and Timing

The following diagram illustrates the behavior and timing characteristics as the device wakes from sleep.

Figure 7-13. Wake Signal Timing

Table 7-18. 10BASE-T1S PMA Receiver Wake Signal Characteristics
Parameter		Symbol	Min	Typ	Max	Units	Additional Information
	MDI wake detection time	t_{det_mdi}	250		450	μs	Note 1
	MDI wake signal threshold	V_{thresh_mdi}	100		700	mV_pp	Note 2
Note: The device will not wake if the signal duration is less than or equal to the minimum value of t_{det_mdi}. It will wake if the signal duration is greater than or equal to the maximum value of t_{det_mdi}. The behavior is undefined for signal duration between these limits. The device will not wake if the signal amplitude is less than or equal to the minimum V_{thresh_mdi}. It will wake if the signal amplitude is greater than or equal to the maximum value V_{thresh_mdi}. The behavior is undefined for amplitudes between these limits.

Table 7-19. WAKE_IN Signal Characteristics
Parameter		Symbol	Min	Typ	Max	Units	Additional Information
	WAKE_IN detection time	t_{det_wi}	15		40	μs	Notes 1, 2
Note: The device will not wake if the signal duration is less than or equal to the minimum value of t_{det_wi}. It will wake if the signal duration is greater than or equal to the maximum value of t_{det_wi}. The behavior is undefined for signal duration between these limits. The WAKE_IN pin is a standard VI-VDDAU type input buffer. See the section DC Electrical Characteristics (other than 10BASE-T1S PMA) for details.

Table 7-20. Wake Signal Time
Description	Symbol	Min	Typ	Max	Units	Additional Information
IRQ_N assertion time after all power supplies valid	t_{po_irq}		6.6		μs
MDI wake forward signaling activity start after all power supplies valid	t_{po_mdi}		2		μs
WAKE_OUT wake forward assertion time after all power supplies valid	t_{po_wo}		1.8		µs
WAKE_OUT pulse width	t_wo		90		μs
MDI wake signaling time	t_{wk_mdi}		1		ms
Power supply response time	t_{ps_resp}	Application Specific				Note 1
Note: The power supply response time is the length of time from the power supplies being enabled by INH being driven high to the time the VDDP and VDDA supplies are high enough to release the internal power-on reset circuits. This time is dependent upon the implementation of the external power supply circuits and therefore is implementation specific.

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.