LAN8670/1/2

7.6.8 SMI Timing

This section specifies the serial management interface timing of the device.

Table 7-15. SMI Timing
Description	Symbol	Min	Max	Units
MDC period	t_clkp	250		ns
MDC high time	t_clkh	t_clkp * 0.4		ns
MDC low time	t_clkl	t_clkp * 0.4		ns
MDIO (read from PHY) output valid from rising edge of MDC	t_val		130	ns
MDIO (read from PHY) output invalid from rising edge of MDC	t_oinvld	0		ns
MDIO (write to PHY) setup time to rising edge of MDC	t_su	10		ns
MDIO (write to PHY) input hold time after rising edge of MDC	t_ihold	10		ns

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