4.8.5 Transmit Collisions

By their very nature, transmitters on pure CSMA/CD networks (without PLCA) will at times collide at a rate dependent on the utilization of the network traffic on the mixing segment collision domain. As a result, many media access controllers (MACs) include collision counters so the station host controller can monitor the performance of the network segment. When PLCA is enabled the physical collisions of multiple transmitters are avoided. While PLCA prevents physical collisions on the physical media, as a part of normal operation the PLCA RS will at times assert a logical, or false, collision to the MAC to align the MAC’s transmission with the PHY’s transmit opportunity.

These PLCA logical collisions will be counted by a MAC collision counter and lead the host controller to the wrong conclusion about the state of collisions on the network segment. The PHY therefore contains an internal physical collision counter. The host controller can monitor the number of physical collisions the PHY has encountered when transmitting packets onto the network by reading the Corrupted Transmit Count (CORTXCNT) in the 10BASE-T1S PCS Diagnostic 2 (T1SPCSDIAG2) register. Additionally, when the PHY detects a collision while transmitting the Transmit Collision Status (TXCOL) bit in the Status 1 (STS1) register is set. If the Transmit Collision Interrupt Mask (TXCOLM) is enabled in the Interrupt Mask 1 (IMSK1) register then the IRQ_N pin will assert. In a properly configured and operating PLCA mixing segment, no transmit collisions will be detected and the transmit collision counter will remain zero.

For devices of revision D0 and later, it is possible to disable the CORTXCNT physical collision detection counter as well as the signaling of collisions to the MAC via the MII or RMII. These settings are only available while a ‘1’ is written into the Collision Detect Enable (CDEN) bin in the Collision Detector Control 0 (CDCTL0) register enabling the detection of physical collisions on the medium. These configuration options are controlled by the Collision Counting and MAC Forwarding Configuration (CCMFC) bit field of the CDCTL0 register and enables the device to be configured according to the IEEE default or the Open Alliance default settings. See Table 4-2 shows the collision counting and signaling options.