1.6.8 Temperature and Voltage Monitors
(Ask a Question)PolarFire family of devices have ASIC IP temperature and voltage monitoring circuits. This IP block has only outputs to the FPGA fabric. The block is called G5_CONTROL_TVS.
The Libero SoC tool automatically configures this block based on user configuration, removing complexities from the designer. When these features are not in use, the Libero SoC tool sets the configuration registers to hold the block in reset. These blocks have SEU immune, flash based, register level lock bits that can be enabled to avoid inadvertent changes to the configuration registers. This provides further assurance that the block configuration remains unchanged. For more information about registers and lock bit, see Device Configuration Report and Register Locks section.