1.6.10 SPI, System Services Interface, and uPROM
(Ask a Question)PolarFire family of devices have the additional ASIC IP blocks:
- G5_CONTROL_SPI - Interface that provides the FPGA fabric access to the external SPI interface.
- G5_CONTROL_SYS_SERVICES - System services interface to the FPGA fabric.
- uPROM - FPGA fabric interface to the uPROM.
The Libero SoC tool automatically configures these building blocks based on the designer's configuration, removing complexities from the designer. When these features are not in use, the Libero SoC tool ties all the FPGA fabric sourced inputs to a disabled logic level through SEU immune, fabric flash bits. This ensures that the IP blocks remain inoperable.
