15.6 Register Summary
For descriptions and definitions of both Register and bitfield properties, refer to Register Properties.
Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|
0x00 | WRCTRL | 31:24 | ||||||||
23:16 | KEY[7:0] | |||||||||
15:8 | PERID[15:8] | |||||||||
7:0 | PERID[7:0] | |||||||||
0x04 | EVCTRL | 7:0 | ERREO | |||||||
0x05 ... 0x07 | Reserved | |||||||||
0x08 | INTENCLR | 7:0 | ERR | |||||||
0x09 | INTENSET | 7:0 | ERR | |||||||
0x0A ... 0x0F | Reserved | |||||||||
0x10 | INTFLAGAHB | 31:24 | ||||||||
23:16 | ||||||||||
15:8 | HSUSB1 | HSUSB0 | SQI1 | SQI0 | BROMC | |||||
7:0 | ||||||||||
0x14 | INTFLAGA | 31:24 | SERCOM8 | SERCOM7 | SERCOM6 | SERCOM5 | SERCOM4 | SERCOM3 | SERCOM2 | SERCOM1 |
23:16 | SERCOM0 | EVSYS | BROMC | DMAC | PORT | TRAM | MCRAMC-APB | |||
15:8 | DRMTCM | PAC | EIC | RTC | WDT | FREQM | MCLK | GCLK | ||
7:0 | OSC32KCTRL | OSCCTRL | RSTC | SUPC | PM | FCR-APB | FCW | DSU | ||
0x18 | INTFLAGB | 31:24 | TRNG | SQI1 | SQI0 | GMAC | ||||
23:16 | CAN5 | CAN4 | CAN3 | CAN2 | CAN1 | CAN0 | ||||
15:8 | SPI_IXS1 | SPI_IXS0 | PTC | AC | ADC | TCC9 | TCC8 | TCC7 | ||
7:0 | TCC6 | TCC5 | TCC4 | TCC3 | TCC2 | TCC1 | TCC0 | SERCOM9 | ||
0x1C | INTFLAGC | 31:24 | ||||||||
23:16 | ||||||||||
15:8 | ||||||||||
7:0 | MLB | |||||||||
0x20 ... 0x33 | Reserved | |||||||||
0x34 | STATUSA | 31:24 | SERCOM8 | SERCOM7 | SERCOM6 | SERCOM5 | SERCOM4 | SERCOM3 | SERCOM2 | SERCOM1 |
23:16 | SERCOM0 | EVSYS | BROMC | DMAC | PORT | TRAM | MCRAMC-APB | |||
15:8 | DRMTCM | PAC | EIC | RTC | WDT | FREQM | MCLK | GCLK | ||
7:0 | OSC32KCTRL | OSCCTRL | RSTC | SUPC | PM | FCR-APB | FCW | DSU | ||
0x38 | STATUSB | 31:24 | TRNG | SQI1 | SQI0 | GMAC | ||||
23:16 | CAN5 | CAN4 | CAN3 | CAN2 | CAN1 | CAN0 | ||||
15:8 | SPI_IXS1 | SPI_IXS0 | PTC | AC | ADC | TCC9 | TCC8 | TCC7 | ||
7:0 | TCC6 | TCC5 | TCC4 | TCC3 | TCC2 | TCC1 | TCC0 | SERCOM9 | ||
0x3C | STATUSC | 31:24 | ||||||||
23:16 | ||||||||||
15:8 | ||||||||||
7:0 | MLB |