15.6.9 Peripheral Write Protection Status A
Reading the STATUSA register returns the peripheral write protection status of the indicated peripherals:
0 Peripheral is not write protected.
1 Peripheral is write protected.
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | STATUSA |
| Offset: | 0x34 |
| Reset: | 0x00000000 |
| Property: | - |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| SERCOM8 | SERCOM7 | SERCOM6 | SERCOM5 | SERCOM4 | SERCOM3 | SERCOM2 | SERCOM1 | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| SERCOM0 | EVSYS | BROMC | DMAC | PORT | TRAM | MCRAMC-APB | |||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| DRMTCM | PAC | EIC | RTC | WDT | FREQM | MCLK | GCLK | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| OSC32KCTRL | OSCCTRL | RSTC | SUPC | PM | FCR-APB | FCW | DSU | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 23, 24, 25, 26, 27, 28, 29, 30, 31 – SERCOMx x=0,1,...8
For SERCOM8 see Note 3.
For SERCOM6 see Note 2.
For SERCOM4 and SERCOM5 see Note 1.