Note: Subsequent to an interrupt flag being cleared, the flag must be read back to verify
the clear before exiting the ISR. Failure to do this can result in duplicate interrupts.
This flag is set when a Peripheral Access Error occurs while accessing the peripheral
associated with the respective INTFLAGC bit. An interrupt request is generated if
INTENCLR/SET.ERR is '1'.
Writing a '0' to these bits has no effect.
Writing a '1' to these bits clears the corresponding INTFLAGC interrupt flag.
Table 15-9. Register Bit Attribute
Legend| Symbol | Description | Symbol | Description | Symbol | Description |
|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
