47.5.12.2 Audio Data Length
The SPIxCTRL_*.AUDWD_MODE[1,0] determines the audio data length. In Audio Protocol Mode it selects different lengths than it does in SPI Mode. It supports audio data transmit/receive lengths of 16, 20, 24, and 32 bits. Actual data can be any length up to 32-bits, but must be packed in one of those four formats.
AUDWD_MODE [1,0] also controls the (left/right) channel length or the I8S Audio format protocols which can be different than the audio data length. For I2S format16-bit data it provides the option of either a 16-bit channel or a 32-bit channel. For 20-bit, 24-bit and 32-bit data or I8S formats the channel is always comprised of a 32-bit word. Channel length inherently controls the Frame length as a Frame of audio data is made up of two channels. For I2S 16-bit channels, a Frame is 32 Serial Clocks. For I2S 32-bit channels, a Frame is 64 Serial Clocks, and for all I8S modes a frame is 256 Serial Clocks
Further, AUDWD_MODE[1,0] determines the width of the data in the FIFO. For 32 24 and, 20-bit audio data (and some16-bit modes), the FIFO data is 32-bits wide and for some 16-bit audio modes, the FIFO is 16-bits data. The FIFO supports data writes either a 8-bits, 16-bits, 20-bits, 24-bits, or 32-bits per transaction. However, if the written data is a greater length than selected, the upper bytes are ignored. Also, if the written data is a lesser length than selected, the FIFO pointers change on the write to the Most Significant Byte of the selected length.
For example, the audio data length is set to 24-bits and the data writes are 8-bits each. Software then writes a byte at a time to the FIFO starting at its lowest address, offset 0020h. The next byte write is to address offset 0021h, followed by 0022h. On the write the 0022h the data is fully pushed into the FIFO and the next audio data word write must be to offset 0020h.
Data written to unused bytes is ignored. Also, transactions that are only to unused bytes are also ignored. Therefore a byte write to address offset 0023h is completely ignored and does not cause a FIFO push.