v2024.1

1 What's New
Information about what is new in Libero SoC Design Suite
2 Download Help
Information to help you download the Libero SoC Design Suite documentation
3 SmartHLS Compiler
Information about SmartHLS Compiler
4 Installation and Licensing
Information about Libero SoC software installation and licensing
5 Design Flow
Information about Design Flow
6 Block Flow
Information about Block Flow
7 SmartDesign
Information about SmartDesign
8 Netlist Viewer
Information about Netlist Viewer
9 I/O Editor
Information about I/O Editor
10 PDC Commands
Information about PDC commands for all families
11 Chip Planner
Information about Chip Planner
12 Timing Constraints Editor
Information about Timing Constraints Editor
13 SmartTime Static Timing Analyzer
Information about SmartTime Static Timing Analyzer
14 SmartPower
Information about SmartPower
15 Programming and Debugging
Information about Programming and Debugging
16 Macro Library
Information about Macro Library for SmartFusion2, IGLOO2 and PolarFire
17 Custom Flow
Information about Custom Flow
18 Design Separation Methodology
Information about Design Separation Methodology
19 Microchip Separation Verification Tool
Information about Microchip Separation Verification Tool
20 PolarFire SoC Microcontroller Subsystem (MSS)
Information about PolarFire SoC Microcontroller Subsystem (MSS)
21 Tcl Command Reference
Information about Tcl Command Reference
22 More Information
Additional information about other Microchip products
23 Technical Support
24 About Microchip
More information about Microchip

9.5 Interface—Specific I/Os and Views

The PolarFire architecture is designed and optimized to support Memory interface, IOD interface, and Transceiver interface. The I/O Editor for PolarFire provides three special views specifically for I/O assignments of these interfaces.

For optimal Quality of Result (QOR) and timing performance, the architecture of the PolarFire silicon requires the Memory Interface, IOD Interface and Transceiver Interface be placed in specific and pre-defined locations of the chip. Assignment of these interfaces are checked against PolarFire DRC rules and illegal assignments are flagged.

The I/O Editor is a Graphical User Interface (GUI) tool designed to make Interface I/O pin assignments graphically and user-friendly, as an alternative to writing PDC commands. When the pin assignment is committed and saved in I/O Editor, a PDC file is created. This PDC file can then be passed to the Place and Route tool as a Physical Design Constraint.