13.15.2 Reset Control Registers
| Register | Bit Range | Bits | All Resets | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31/15 | 30/14 | 29/13 | 28/12 | 27/11 | 26/10 | 25/9 | 24/8 | 23/7 | 22/6 | 21/5 | 20/4 | 19/3 | 18/2 | 17/1 | 16/0 | ||||
| 0XC | RCON | 31:16 | POR_IO | POR_CORE | — | — | BCFGERR | BCFGFAIL | NVMLTA | NVMEOL | — | — | — | — | — | — | — | VBAT | 0000 |
| 15:0 | — | — | — | — | — | DPSLP | CMR | — | EXTR | SWR | DMTO | WDTO | SLEEP | IDLE | BOR | POR | 0000 | ||
| 0X10 | RSWRST | 31:16 | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | 0000 |
| 15:0 | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | SWRST | 0000 | ||
| 0X14 | RNMICON | 31:16 | — | — | — | — | — | — | DMTO | WDTR | SWNMI | — | — | — | EXT | PLVD | CF | WDTS | 0000 |
| 15:0 | NMICNT[15:0] | 0000 | |||||||||||||||||