58.6.8.4.2 Write Access Counter

QSPI_WRACNT.NBWRA defines the number of bytes to be sent to the memory before QSPI_ISR.LWRA rises, which indicates that the last byte has been transmitted. If QSPI_IFR.PROTTYP = ‘3’ and QSPI_IFR.HFWBEN = ‘1’, QSPI_WRACNT.NBWRA is reset after setting QSPI_IFR.HFWBEN bit to ‘1’ and counts data on every frame.

At each system bus access, an SPI transfer is performed with the same size. For example, a halfword system bus access leads to a 16-bit SPI transfer, and a byte system bus access leads to an 8-bit SPI transfer. A special case is an instruction frame with address field and no data. In this case the instruction frame is triggered by setting QSPI_CR.STTFR and QPI_IAR is used for the address field. See Figure 58-13 for details.