1 Packaging Overview
(Ask a Question)PolarFire SoC FPGAs are available in multiple packages. Each package (device variant) has various I/O banks with the flexibility of using different I/O standards. HSIO and GPIO banks have a maximum supply voltage of 1.8V and 3.3V, respectively.
The following table lists the PolarFire SoC FPGA variants, with user I/O and XCVR lanes, in Pb-free packages.
Bank Number | FCG1152 | FCG1152 | FCVG784 | FCVG784 | FCVG484 | FCSG536 | FCSG325 |
---|---|---|---|---|---|---|---|
MPFS460T | MFPS250T | MPFS250T/MPFS160T | MPFS095T | MPFS250T/MPFS160T/MPFS095T/MPFS025T | MPFS250T/MPFS160T/MPFS095T | MPFS095T/MPFS025T | |
Bank 0 | HSIO | HSIO | HSIO | HSIO | HSIO | HSIO | HSIO |
Bank 1 | GPIO | GPIO | GPIO | GPIO | GPIO | GPIO | GPIO |
Bank 2 | MSSIO | MSSIO | MSSIO | MSSIO | MSSIO | MSSIO | MSSIO |
Bank 3 | JTAG/FIXED I/O | JTAG/FIXED I/O | JTAG/FIXED I/O | JTAG/FIXED I/O | JTAG/FIXED I/O | JTAG/FIXED I/O | JTAG/FIXED I/O |
Bank 4 | MSSIO | MSSIO | MSSIO | MSSIO | MSSIO | MSSIO | MSSIO |
Bank 5 | MSS-SGMII | MSS-SGMII | MSS-SGMII | MSS-SGMII | MSS-SGMII | MSS-SGMII | MSS-SGMII |
Bank 6 | MSS-DDR | MSS-DDR | MSS-DDR | MSS-DDR | MSS-DDR | MSS-DDR | MSS-DDR |
Bank 7 | GPIO | GPIO | GPIO | — | — | GPIO | — |
Bank 8 | HSIO | HSIO | HSIO | HSIO | — | — | — |
Bank 9 | GPIO | GPIO | GPIO | GPIO | — | — | — |
XCVR 0 | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
XCVR 1 | Yes | Yes | Yes | No | No | No | No |
XCVR 2 | Yes | Yes | No | No | No | No | No |
XCVR 3 | Yes | Yes | No | No | No | No | No |
XCVR 4 | Yes | No | No | No | No | No | No |
Note: 12 I/Os from Bank 9 are connected to Bank 1 power in the package
substrate to maintain pin-migration among devices and to maximize pin count in this
package.