Cross-probing of design objects is available from SmartTime to Chip Planner, but
not vice versa. Cross-probing allows you to select a design object in one
application and display the selected object in another application.
Complete the Place and Route step on the design, and
then open both SmartTime and Chip Planner.
Because Libero SoC allows
you to cross-probe design objects from SmartTime to Chip Planner, you can
better understand how the two applications interact with each other. With
cross-probing, a timing path not meeting timing requirements can be fixed
with relative ease when you see the less-than-optimal placement of the
design object (in terms of timing requirements) in Chip Planner.
Cross-probing from SmartTime to Chip Planner is available for the following
design objects:To cross-probe from SmartTime to Chip Planner, use a design macro in
SmartTime.
