46.6.1.5 Position Counter Hold Register

Name:	POSHLD
Offset:	0x40
Reset:	0x00000000
Property:	RW


Bit	31	30	29	28	27	26	25	24
	POSHLD[31:24]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	POSHLD[23:16]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	POSHLD[15:8]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	POSHLD[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 31:0 – POSHLD[31:0] Hold Register for Reading and Writing Position Counter Register (POSxCNT) bits

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.