16.4.12 Filter (Secondary Accumulator)
The secondary accumulator is implemented on the last two channels of each ADC, as shown in Table 16-5.
| ADC Number | Channel Number | Secondary Register |
|---|---|---|
| 1 | 5 | AD1ACC5 |
| 6 | AD1ACC6 | |
| 2 | 6 | AD2ACC6 |
| 7 | AD2ACC7 | |
| 3 | 10 | AD3ACC10 |
| 11 | AD3ACC11 |
The secondary accumulator ADnACCx sums the output of the primary accumulator ADnDATAx.
The secondary accumulator is enabled when the ACCRO bit (ADnCHxCON2[31]) is set. If the
ACCRO bit = ‘1’, the ADnDATAx and ADnACCx accumulators are not cleared;
instead, they will roll over as the data is accumulated over many multi-sample
operations. The accumulators function as a Second Order Cascaded-Integrator-Comb filter
(CIC). Some of the CIC operations (differentiation functions) need to be performed by
the application software as shown in Figure 16-3.