4.3.7 BMX Error Status Register for CPU Initiator

Name: BMXCPUERR
Offset: 0x788

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
      IRAMWERRADDWERRBADTGTWERR 
Access R/HS/CR/HS/CR/HS/C 
Reset 000 
Bit 15141312111098 
     YRAMRERRXRAMRERR   
Access R/HS/CR/HS/C 
Reset 00 
Bit 76543210 
      IRAMRDERRADDRERRBADTGTRERR 
Access R/HS/CR/HS/CR/HS/C 
Reset 000 

Bit 18 – IRAMWERR IRAM Write Error Flag bit

ValueDescription
1 Error generated by invalid instruction write outside of IRAM space.
0 No IRAM write address errors.

Bit 17 – ADDWERR Invalid Address Write Error Flag bit

ValueDescription
1 Error generated by read or write to invalid address space.
0 No unimplemented address write error.

Bit 16 – BADTGTWERR Invalid Target Write Error Flag bit

ValueDescription
1 Error generated by write to disallowed target space.
0 No invalid target write error.

Bit 11 – YRAMRERR  YRAM Read Error Flag bit

ValueDescription
1 Bus error generated by YRAM read operation.
0 No error on YRAM read operation.

Bit 10 – XRAMRERR  XRAM Read Error Flag bit

ValueDescription
1 Bus error generated by XRAM read operation.
0 No error on XRAM read operation.

Bit 2 – IRAMRDERR IRAM Read Error Flag bit

ValueDescription
1 Error generated by invalid instruction read outside of IRAM space.
0 No IRAM read address errors.

Bit 1 – ADDRERR Invalid Address Error Flag bit

ValueDescription
1 Error generated by read or write to invalid address space.
0 No unimplemented address write error.

Bit 0 – BADTGTRERR Invalid Target Read Error Flag bit

ValueDescription
1 Error generated by read to disallowed target space.
0 No invalid target error.