7.1.3 FDEVOPT Configuration Register

Note:
  1. The fixed pin option is only available for packages larger than 48 pins.
  2. Refer to the pin diagrams for alternate pin availability.
  3. ODPUR should be enabled when using I3C.

Legend: r = Reserved bit; R = Readable bit; W = Writable bit

Name: FDEVOPT
Offset: 0x7F3020

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
     ODPUR3ODPUR2ODPUR1ODPUR0 
Access R/WR/WR/WR/W 
Reset 1111 
Bit 15141312111098 
   SPI2PIN      
Access R/W 
Reset 0 
Bit 76543210 
  BISTDIS ALTI2C2ALTI2C1    
Access R/WR/WR/W 
Reset 111 

Bit 19 – ODPUR3  Open Drain Pull-Up Resistance Enable bit for I3C1ASDA bit(3)

ValueDescription
1 OD pull-up resistance enabled for I3C1ASDA.
0 OD pull-up resistance disabled.

Bit 18 – ODPUR2  Open Drain Pull-Up Resistance Enable bit for I3C1ASCL bit(3)

ValueDescription
1 OD pull-up resistance enabled for I3C1ASCL.
0 OD pull-up resistance disabled.

Bit 17 – ODPUR1  Open Drain Pull-Up Resistance Enable bit for I3C1SDA bit(3)

ValueDescription
1 OD pull-up resistance enabled for I3C1SDA.
0 OD pull-up resistance disabled.

Bit 16 – ODPUR0  Open Drain Pull-Up Resistance Enable bit for I3C1SCL bits(3)

ValueDescription
1 OD pull-up resistance enabled for I3C1SCL.
0 OD pull-up resistance disabled.

Bit 13 – SPI2PIN  SPI 2 Fast I/O Pad Disable bit(1)

ValueDescription
1 SPI2 uses PPS (IO Remap) to make connections with device pins.
0 SPI2 uses direct connections with specified device pins.

Bit 6 – BISTDIS Memory BIST Feature Disable bit

ValueDescription
1 mBIST on Reset feature disabled.
0 mBIST on Reset feature enabled.

Bit 4 – ALTI2C2  Alternate I2C2 Pin Mapping bit(2)

ValueDescription
1 Default location for SCL2/SDA2 pins.
0 Alternate location for SCL2/SDA2 pins (ASCL2/ASDA2).

Bit 3 – ALTI2C1  Alternate I2C1 Pin Mapping bit(2)

ValueDescription
1 Default location for SCL1/SDA1 pins.
0 Alternate location for SCL1/SDA1 pins (ASCL1/ASDA1).