2.3.1.4 JTAG/Probe Pins
The following table lists the JTAG/Probe pins.
| Name | Type | Description |
|---|---|---|
| PRA/B/C/D | Probe A, B, C, and D |
The Probe pins are used to output data from any user-defined design node within the device (controlled with Silicon Explorer II). These independent diagnostic pins can be used to allow real-time diagnostic output of any signal path within the device. The pins’ probe capabilities can be permanently disabled to protect programmed design confidentiality. The probe pins are of LVTTL output levels. |
| TCK | Test clock | Test clock input for JTAG boundary-scan testing and diagnostic probe (Silicon Explorer II). |
| TDI | Test data input |
Serial input for JTAG boundary-scan testing and diagnostic probe. TDI is equipped with an internal 10 kΩ pull-up resistor. |
| TDO | Test data output | Serial output for JTAG boundary-scan testing. |
| TMS | Test mode select |
The TMS pin controls the use of the IEEE 1149.1 boundary-scan pins (TCK, TDI, TDO, and TRST). TMS is equipped with an internal 10 kΩ pull-up resistor. |
| TRST | Boundary scan reset pin |
The TRST pin functions as an active-low input to asynchronously initialize or reset the boundary scan circuit. The TRST pin is equipped with a 10 kΩ pull-up resistor. |