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AVR32SD20/28/32 Preliminary Data Sheet

AVR32SD20 AVR32SD28 AVR32SD32

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10 AVR® CPU
10.5 Functional Safety

Introduction
Features
AVR® SD Family Overview
1 Functional Safety Concept
2 Security Concept
3 Block Diagram
4 Pinout
5 I/O Multiplexing and Considerations
6 Hardware Guidelines
7 Power Supply
8 Conventions
9 BOOTROM - Boot ROM Code
10 AVR® CPU
11 BUSMATRIX - Bus Matrix
12 Memories
13 Peripherals and Architecture
14 Getting Started with Software Development
15 GPR - General Purpose Registers
16 NVMCTRL - Nonvolatile Memory Controller
17 RAMCTRL - RAM Controller
18 CLKCTRL - Clock Controller
19 SLPCTRL - Sleep Controller
20 RSTCTRL - Reset Controller
21 CPUINT - CPU Interrupt Controller
22 ERRCTRL - Error Controller
23 EVSYS - Event System
24 PORTMUX - Port Multiplexer
25 PORT - I/O Pin Configuration
26 MVIO - Multi-Voltage I/O
27 BOD - Brown-out Detector
28 VREF - Voltage Reference
29 WDT - Watchdog Timer
30 SWDT - Synchronous Watchdog Timer
31 TCA - 16-bit Timer/Counter Type A
32 TCB - 16-Bit Timer/Counter Type B
33 TCD - 12-Bit Timer/Counter Type D
34 RTC - Real-Time Counter
35 USART - Universal Synchronous and Asynchronous Receiver and Transmitter
36 SPI - Serial Peripheral Interface
37 TWI - Two-Wire Interface
38 CRCSCAN - Cyclic Redundancy Check Memory Scan
39 CCL - Configurable Custom Logic
40 AC - Analog Comparator
41 ADC - Analog-to-Digital Converter
42 DAC - Digital-to-Analog Converter
43 ZCD - Zero-Cross Detector
44 UPDI - Unified Program and Debug Interface
45 Instruction Set Summary
46 Electrical Characteristics
47 Characteristics Graphs
48 Ordering Information
49 Package Drawings
50 Data Sheet Revision History
Microchip Information

10.5 Functional Safety

The Functional Safety aspects of the CPU are detailed in the Functional Safety Concept section.

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