10.4.2.3.4 Configuration Lock

The peripheral clock configuration can be locked against further write accesses by setting the Write Lock bit in the Peripheral Channel Control register (PCHCTRL[n].WRTLOCK) to ‘1’. After this, all writes to the PCHCTRL[n] register will be ignored. The PCHCTRL[n] register can only be unlocked by a Device Reset.

The Generator source of a locked peripheral channel will also be locked. The corresponding Generator Control (GENCTRL[n]) register is locked and can only be unlocked by a Device Reset.

Note: Generator 0 (GCLK_GEN0) is an exception to the configuration lock. Since Generator 0 is the only clock source for GCLK_MAIN, it can not be locked.