10.4.2.3.1 Enabling a Peripheral Clock

Before enabling a peripheral clock, one of the Generators must be enabled (GENCTRL[n].GENEN = ‘1’) and selected as a source for the peripheral channel by setting the Generator Selection (GEN) bit field of the Peripheral Channel Control (PCHCTRL[n]) register. Any available Generator can be selected as a clock source for any peripheral channel. Refer to the following mapping table for mapping of peripherals to index n.

When a Generator has been selected, the peripheral clock is enabled by writing the Channel Enable bit in the PCHCTRL[n] register (PCHCTRL[n].CHEN) to ‘1’. The CHEN bit must be synchronized to the generic clock domain. The CHEN bit will continue to read as its previous state until the synchronization is complete.

The index values of the PCHCTRLm registers are shown in the following table. Use this index to configure the desired generator with the relevant peripheral channel:

Table 10-3. PCHCTRLm Mapping
Index [m]NameDescription
0GCLK_EICEIC
1GCLK_EVSYS_CHANNEL0EVSYS CHANNEL 0
2GCLK_EVSYS_CHANNEL1EVSYS CHANNEL 1
3GCLK_EVSYS_CHANNEL2EVSYS CHANNEL 2
4GCLK_EVSYS_CHANNEL3EVSYS CHANNEL 3
5GCLK_SERCOM0_SLOWSERCOM0 SLOW
6GCLK_SERCOM0_CORESERCOM0 CORE
7GCLK_SERCOM1_SLOWSERCOM1 SLOW
8GCLK_SERCOM1_CORESERCOM1 CORE
9GCLK_TC0, GCLK_TC1TC0, TC1
10GCLK_TC2TC2
11GCLK_TCC0TCC0
12GCLK_CCLCCL