13.6.4 Interrupt Flag Software Set
The Interrupt Flag Software Set register (INTFLAGSET) offers a way to set the INTFLAG register bits individually by software. This allows for testing of any associated Interrupt Software Routine (ISR). This feature may be useful for safety applications.
The read value reflects the current state of the INTFLAG register.
Write any bit to ‘1’ to set the corresponding interrupt flag in the
INTFLAG register.
| Name: | INTFLAGSET |
| Offset: | 0x10 |
| Reset: | 0x00000000 |
| Property: | Local Write-Protection |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CLKFAIL | OSC32KRDY | XOSC32KRDY | |||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 |
Bit 2 – CLKFAIL XOSC32K Clock Failure Detected
This flag is cleared by writing a ‘1’ to INTFLAG.CLKFAIL.
This flag is set on a ‘0’-to-‘1’ transition of the
corresponding flag in the STATUS register and will generate an interrupt request
if the INTENSET/INTENCLR.CLKFAIL bit is ‘1’.
Writing a ‘0’ to this bit has no effect.
Writing a ‘1’ to set the corresponding bit in the INTFLAG
register.
Bit 1 – OSC32KRDY OSC32K Ready
This flag is cleared by writing a ‘1’ to INTFLAG.OSC32KRDY.
This flag is set on a ‘0’-to-‘1’ transition of the
corresponding flag in the STATUS register and will generate an interrupt request
if the INTENSET/INTENCLR.OSC32KRDY bit is ‘1’.
Writing a ‘0’ to this bit has no
effect.
Writing a ‘1’ to set the corresponding bit in the INTFLAG
register.
Bit 0 – XOSC32KRDY XOSC32K Ready
This flag is cleared by writing a ‘1’ to INTFLAG.XOSC32KRDY.
This flag is set on a ‘0’-to-‘1’ transition of the
corresponding flag in the STATUS register and will generate an interrupt request
if the INTENSET/INTENCLR.XOSC32KRDY bit is ‘1’.
Writing a ‘0’ to this bit has no effect.
Writing a ‘1’ to set the corresponding bit in the INTFLAG
register.
