13.6.7 XOSC32K Control
| Name: | XOSC32KCTRL |
| Offset: | 0x1C |
| Reset: | 0x00000080 |
| Property: | Local Write-Protection |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| WRTLOCK | |||||||||
| Access | R/W | ||||||||
| Reset | 0 |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| LPMODE | CSUT[1:0] | ||||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 | ||||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ONDEMAND | XTALEN | ENABLE | |||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 1 | 0 | 0 |
Bit 31 – WRTLOCK Write Lock
This bit controls whether the XOSC32K Control register
(XOSC32KCTRL) is locked for future writes. When the Write Lock
(XOSC32KCTRL.WRTLOCK) bit is ‘1’, the configuration for the
XOSC32K oscillator is locked and can only be unlocked by a Device Reset.
Writes to this register, when Local Write-Protection is enabled, will be discarded and return a bus error.
A write access from a debugger will disregard the status of WRTLOCK. Even if the
XOSC32KCTRL.WRTLOCK bit is ‘1’, this will not prevent a
debugger write to the XOSC32KCTRL register.
A Device Reset will clear this bit to the unlocked state.
| Value | Description |
|---|---|
| 0 | The XOSC32K configuration is not locked |
| 1 | The XOSC32K configuration is locked |
Bit 13 – LPMODE Low Power Mode
This bit selects whether the 32.768 kHz crystal oscillator is set to Low Power mode.
| Value | Description |
|---|---|
| 0 | Low Power off |
| 1 | Low Power on |
Bits 9:8 – CSUT[1:0] Crystal Oscillator Start-Up Time
This bit field selects the start-up time for the crystal oscillator.
If an external clock is selected in the External Source Select bit (XTALEN =
‘0’), the start-up time will not be applied.
| Value | Name | Description |
|---|---|---|
| 0x0 | 1K | 1K XOSC32K cycles |
| 0x1 | 16K | 16K XOSC32K cycles |
| 0x2 | 32K | 32K XOSC32K cycles |
| 0x3 | 64K | 64K XOSC32K cycles |
Bit 7 – ONDEMAND On-Demand Operation
Writing a ‘0’ to this bit will cause the XOSC32K oscillator to
always run when the Oscillator Enable bit (XOSC32KCTRL.ENABLE) is
‘1’.
Writing a ‘1’ to this bit will cause the XOSC32K oscillator to run
only if the XOSC32KCTRL.ENABLE bit is ‘1’ and it is requested
by a peripheral. If there no peripherals are requesting the XOSC32K clock
source, the XOSC32K oscillator will be in a disabled state.
Refer to the Sleep Mode Operation section for additional information.
| Value | Name | Description |
|---|---|---|
| 0 | DISABLE | The XOSC32K On-Demand Operation is disabled |
| 1 | ENABLE | The XOSC32K On-Demand Operation is enabled |
Bit 2 – XTALEN External Source Select
This bit selects the external clock source type.
| Value | Name | Description |
|---|---|---|
| 0 | EXTCLK | External Clock on the XTAL32K1 pin. XTAL32K2 is available for other functions. The CSUT timer is disregarded, and no start-up time is used. |
| 1 | XTAL | External Crystal connected to the XTAL32K1 and XTAL32K2 pins |
Bit 1 – ENABLE Oscillator Enable
0’ to this bit disables the XOSC32K oscillator, and the
respective input pins XTAL32K1 and XTAL32K2 may be configured as I/O pins. 0' without altering any other bits. Then, wait until
the ENABLE bit has been synchronized by polling the XOSC32K Ready bit in the
STATUS register (STATUS.XOSC32KRDY) until it is ‘0’. After
the synchronization is completed, all bits in this register can be freely
written to any value.Writing a ‘1’ to this bit overrides the configuration of the
respective input pins to XTAL32K1 and, depending on the XTALEN configuration,
potentially XTAL32K2. If the XOSC32KCTRL.ONDEMAND bit is ‘1’,
the oscillator is not started unless it is requested as a clock source. If the
XOSC32KCTRL.ONDEMAND bit is ‘0’, the oscillator is always
running.
| Value | Name | Description |
|---|---|---|
| 0 | DISABLED | XOSC32K oscillator is disabled |
| 1 | ENABLED | XOSC32K oscillator is enabled |