13.6.10 32.768 kHz Internal Oscillator (OSC32K) Control
| Name: | OSC32KCTRL |
| Offset: | 0x28 |
| Reset: | 0x00000080 |
| Property: | Local Write-Protection |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| WRTLOCK | |||||||||
| Access | R/W | ||||||||
| Reset | 0 |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ONDEMAND | |||||||||
| Access | R/W | ||||||||
| Reset | 1 |
Bit 31 – WRTLOCK Write Lock
This bit controls whether the OSC32K Control register (OSC32KCTRL) is locked for
future writes. When the Write Lock bit (OSC32KCTRL.WRTLOCK) is
‘1’, the configuration for the OSC32K oscillator is locked
and can only be unlocked by a Device Reset.
Writes to this register, when Local Write-Protection is enabled, will be discarded and return a bus error.
A write access from a debugger will disregard the status of WRTLOCK. Even if the
OSC32KCTRL.WRTLOCK bit is ‘1’, this will not prevent a debugger
write to the OSC32KCTRL register.
A Device Reset reset will clear this bit to the unlocked state.
| Value | Description |
|---|---|
| 0 | The OSC32K configuration is not locked |
| 1 | The OSC32K configuration is locked |
Bit 7 – ONDEMAND On-Demand Operation
Writing a ‘0’ to this bit will cause the OSC32K oscillator to always
run when the Oscillator Enable bit (OSC32KCTRL.ENABLE) is ‘1’.
Writing a ‘1’ to this bit will cause the OSC32K oscillator run only
if the OSC32KCTRL.ENABLE bit is ‘1’ and it is requested by a
peripheral. If no peripherals are requesting the OSC32K clock source, the OSC32K
oscillator will be in a disabled state.
Refer to the Sleep Mode Operation section for additional information.
| Value | Name | Description |
|---|---|---|
| 0 | DISABLE | The OSC32K On-Demand Operation is disabled |
| 1 | ENABLE | The OSC32K On-Demand Operation is enabled |
