17.4.11 Filter (Secondary Accumulator)
The secondary accumulator is implemented on the last two channels of each ADC as shown in Table 17-6.
| ADC Number | Channel Number | Secondary Register |
|---|---|---|
| 1 | 6 | AD1CH6ACC |
| 7 | AD1CH7ACC | |
| 2 | 6 | AD2CH6ACC |
| 7 | AD2CH7ACC | |
| 3 | 6 | AD3CH6ACC |
| 7 | AD3CH7ACC | |
| 4 | 6 | AD4CH6ACC |
| 7 | AD4CH7ACC | |
| 5 | 14 | AD5CH14ACC |
| 15 | AD5CH15ACC |
The secondary accumulator ADnCHxACC sums the output of the primary accumulator
ADnCHxDATA. The secondary accumulator is enabled when the ACCRO bit (ADnCHxCON2[31]) is
set. If the ACCRO bit = ‘1’, the ADnCHxDATA and ADnCHxACC accumulators
are not cleared; instead, they will roll over as the data are accumulated over many
multisample operations. The accumulators function as a Second Order
Cascaded-Integrator-Comb filter (CIC). Some of the CIC operations (differentiation
functions) need to be performed by the application software as shown in Figure 17-3.