4.4 Prefetch Branch Unit (PBU)

The Prefetch Branch Unit (PBU) in the dsPIC33A core devices accelerates the interface between the Program Flash Memory (PFM) and the CPU instruction bus. The PBU can predictively prefetch the next sequential address and cache fetched program data that are the target of a CPU instruction fetch.

The PBU block diagram in Figure 4-21 shows data paths to and from the PBU in the dsPIC33A environment. The PBU provides data when the CPU fetches program data from Flash memory. It may provide program data from an internal buffer or fetch program data from Flash if the requested program data are not available. Flash fetch operations are, therefore, accelerated when data are sourced from internal PBU buffers.