15.14 Error Handling

Every CAN controller checks the messages on the bus for the following errors: bit, stuff, CRC, form and ACK errors. Whenever the controller detects an error, an error frame is transmitted that deletes the message on the bus. Error frames are always signaled using the nominal bit rate.

Error detection and Fault confinement are described in the ISO11898-1:2015. CxTREC contains the error counters, TEC and REC (TERRCNTx, RERRCNTx). CxTREC also contains the error warning and error state bits. TEC and REC increment and decrement according to ISO11898-1:2015 specifications.

Figure 15-49 illustrates the different error states of the CAN FD Protocol module. The module starts in the Error Active State. If the TEC or REC exceeds 127, the module transitions to the Error Passive State. If the TEC exceeds 255, the module will transition to the Bus Off State.

The module transmits active error frames when in an Error Active State. It will transmit passive error frames while in an Error Passive State. When the module is in Bus Off, the CxTX pin is always driven high and no dominant bits are transmitted.

To avoid the module from transitioning to the Error Passive State, the module will alert the application when the TEC or REC reaches 96, using the CERRIF interrupt flag (see CAN Bus Error Interrupt - CERRIF). This allows the application to take action before it enters the Error Passive State.

Figure 15-49. Error States

The Bus Diagnostic registers provide additional information about the health of the CAN bus:

  • CxBDIAG0 contains separate error counters for receive/transmit and for nominal/data bit rates. The counters work differently than the counters in the CxTREC registers. They are simply incremented by one on every error. They are never decremented but can be cleared by writing ‘0’ to the register.
  • CxBDIAG1 keeps track of the kind of error that occurred since the last clearing of the register. The CxBDIAG1 register also contains the error-free message counter. The flags and the counter are cleared by writing ‘0’ to the register.

The error-free message counter, together with the error counters and error flags, can be used to determine the quality of the bus.