15.4.6.2 VDDCORE Supply Monitor Reset

The VDDCORE supply monitor can be configured to generate a reset of the VDDCORE domain. If the VDDCORE supply monitor output is low for more than one slow clock period, the SUPC asserts a VDDCORE reset if SUPC_MR.CORSMRSTEN=1.

If SUPC_MR.CORSMRSTEN=1 and the VDDCORE voltage regulation is below the threshold configured in the supply monitor, the VDDCORE reset signal is asserted for a minimum of one slow clock cycle and de-asserted as soon as supply monitor indicates a valid voltage.