15.4.6 VDDCORE Domain Reset

The SUPC manages the VDDCORE reset signal sent to the Reset Controller, as described in Power-up, Power-down and SUPC Reset. The VDDCORE domain reset signal is asserted before shutting down the VDDCORE power supply and released as soon as the VDDCORE power supply is valid.

There are two additional sources (different from watchdog, user reset) which can be programmed to trigger a VDDCORE domain reset:

a VDD3V3 supply monitor under voltage detection
a VDDCORE supply monitor under voltage detection

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.