20.16.1 CPU Clock Switching Timings

The glitch-free clock switcher implemented to control the sources of CPU_CLK0 and CPU_CLK1 performs clock switching in 5 clock cycles of the currently used clock plus 5 cycles of the target clock.

The clock switching is effective once MCKRDY/CPMCKRDY rise. Refer to the figure below.

Figure 20-7. Switch CPU Clock (CPU_CLK0/1) from Source Clock to Destination Clock