25.8.7 Status

Name: STATUS
Offset: 0x12
Reset: 0x0000
Property: Read-Only

Bit 15141312111098 
     BOOTPROT[3:0] 
Access RRRR 
Reset 000x 
Bit 76543210 
   BPDISAFIRSTSUSPLOADPRMREADY 
Access RRRRRR 
Reset 010000 

Bits 11:8 – BOOTPROT[3:0] Boot Loader Protection Size

This bitfield is loaded from the NVM User page during the device startup (See the Memories chapter).

Defines the size of the BOOTPROT region which is protected against write or erase or Chip-Erase operations. This size is given by the following formula (15-BOOTPROT)*8KB.

Bit 5 – BPDIS Boot Loader Protection Disable

0: Boot loader protection is not discarded.

1: Boot loader protection against modify operations is discarded until CBPDIS is issued or next start-up sequence except for Chip-Erase.

Bit 4 – AFIRST BANKA First

0: Start address of bank B is mapped at 0x0000_0000.

1: Start address of bank A is mapped at 0x0000_0000.

Bit 3 – SUSP NVM Write Or Erase Operation Is Suspended

0: The NVM controller is not in suspended state.

1: The NVM controller is in suspended state.

Bit 2 – LOAD NVM Page Buffer Active Loading

This bit indicates that the NVM page buffer has been loaded with one or more words. Immediately after an NVM load has been performed, this flag is set, and it remains set until a Write Page (WP), Write Quad Word (WQW) or a page buffer clear (PBCLR) command is given.

Bit 1 – PRM Power Reduction Mode

This bit indicates the current NVM power reduction state. The NVM block can be set in power reduction mode in two ways: through the command interface or automatically when entering sleep with CTRLA.PRM set accordingly. PRM can be cleared in three ways: through AHB access to the NVM block, through the command interface (SPRM and CPRM) or when exiting sleep with CTRLA.PRM set accordingly.

0: NVM is not in power reduction mode

1: NVM is in power reduction mode.

Bit 0 – READY Ready to accept a command

0: The NVM controller is busy programming or erasing.

1: The NVM controller is ready to accept a new command.