2.12 UART
The UART Receive Interrupt Flag (URXISEL[1:0] bits = ‘0b01) is asserted
only when the receive buffer equals one-half full and not when the receive buffer is
greater than one-half full.
Work Around
Before exiting the UART RX ISR, make sure all of the contents of the RX buffer were read by reading the contents of the RX buffer in the ISR until the URXDA bit (UxSTA[0]) is cleared and this work around is implemented in Harmony.
Affected Silicon Revisions
| A0 | A1 | B0 | C0 |
|---|---|---|---|
| X | X | X | X |