47.7.13 SPDIF Receiver Write Protection Mode Register

Name: SPDIFRX_WPMR
Offset: 0xE4
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
 WPKEY[23:16] 
Access WWWWWWWW 
Reset 00000000 
Bit 2322212019181716 
 WPKEY[15:8] 
Access WWWWWWWW 
Reset 00000000 
Bit 15141312111098 
 WPKEY[7:0] 
Access WWWWWWWW 
Reset 00000000 
Bit 76543210 
    FIRSTE WPCRENWPITENWPEN 
Access R/WR/WR/WR/W 
Reset 0000 

Bits 31:8 – WPKEY[23:0] Write Protection Key

ValueNameDescription
0x535044 PASSWD Writing any other value in this field aborts the write operation of the WPEN, WPITEN and WPCREN bits. Always reads at 0.

Bit 4 – FIRSTE First Error Report Enable

ValueDescription
0 The last write protection violation source is reported in SPDIFRX_WPSR.WPSRC and the last software control error type is reported in SPDIFRX_WPSR.SWETYP. The SPDIFRX_ISR.SECE flag is set at the first error occurrence within a series.
1 Only the first write protection violation source is reported in SPDIFRX_WPSR.WPSRC and only the first software control error type is reported in SPDIFRX_WPSR.SWETYP. The SPDIFRX_ISR.SECE flag is set at the first error occurrence within a series.

Bit 2 – WPCREN Write Protection Control Register Enable

ValueDescription
0 Disables the write protection on the Control register (SPDIFRX_CR) if WPKEY corresponds to 0x535044.
1 Enables the write protection on the Control register (SPDIFRX_CR) if WPKEY corresponds to 0x535044.

Bit 1 – WPITEN Write Protection Interrupt Enable

ValueDescription
0 Disables the write protection on Interrupt registers if WPKEY corresponds to 0x535044.
1 Enables the write protection on Interrupt registers if WPKEY corresponds to 0x535044.

Bit 0 – WPEN Write Protection Enable

ValueDescription
0 Disables the write protection if WPKEY corresponds to 0x535044 (“SPD” in ASCII).
1 Enables the write protection is enabled. All accesses to configuration registers are canceled and generate an error in the SPDIFRX_WPSR register.