48.6.3 Data Organization

The data field defined by the IEC-60958 standard is 3 bytes long (24 bits). All data to be transmitted on the SPDIF line is sent through the Common Data register (SPDIFTX_CDR).

Data is organized using the following fields in SPDIFTX_MR:

• MULTICH–defines the number of channels that are sent to the interface. When MULTICH is configured in mono channel, the data written in SPDIFTX_CDR is duplicated on the two SPDIF channels. When MULTICH is configured in Dual Channel mode, each SPDIF channel has its own data stream.
• ENDIAN–defines the byte organization in SPDIFTX_CDR (big-endian or little-endian).
• JUSTIFY–defines the location of the valid bits in the CDR/memory container (MSB or LSB). If the data is LSB-justified, the controller automatically shifts the data to align on SPDIF.
• BPS–defines a container of data for one data (it defines the number of valid bytes in SPDIFTX_CDR) and ranges from 1 to 4 bytes.
• VBPS–defines the number of valid bits in the container and ranges from 1 to 32.
• CMODE–defines the transfer mode when BPS is defined on 3 bytes.