23.4.6.1 Period Match and Slow Clock

When using the prescaler, the user software can change the value of the period register faster than one timer period.

Figure 23-7 and Figure 23-6 show that when the counter is operating with an 8x prescale and PRx is written before the end of the prescaler rollover, a period match is not detected and an interrupt is not generated. In this case, the timer will continue running until a compare match occurs between TMRx and the new value M. If M is lower than the original period of N, the timer will run all the way to 0xFFFF_FFFF and rollover to 0x0000_0000.
Figure 23-6. Synchronized External Clock with 8:1 Prescale Timing Diagram (TCS = 1, TCKPS[1:0] = 1)
Figure 23-7. Synchronous Clock with Prescale with Write to PRx Following Match (TCS = 0, TCKPS[1:0] =1)