23.4.6.2 Timer Update and Slow Clock

When using the prescaler, the user software can change the value of the timer register faster than one timer period.

Figure 23-8 shows that when the counter is operating with an 8x prescale and TMRx is written before the end of the prescaler rollover, a period match is not detected and an interrupt is not generated. The user software can write a new value into the TMRx register before the timer resets to zero. In this case, the module will not assert the match signal and will continue counting with the new timer value on the next clock edge.

Figure 23-8. Synchronous Clock with Prescale with Write to TMRx Following Match (TCS = 0, TCKPS[1:0] = 1)