19.4.2 Audio Protocol Interface Mode

The SPI module can be interfaced to most codec devices available today to provide dsPIC33A microcontroller-based audio solutions. The SPI module provides support to the audio protocol functionality through four standard I/O pins. The four pins that make up the audio protocol interface modes are:
  • SDIx: Serial Data Input for receiving sample Digital Audio Data (ADCDAT)
  • SDOx: Serial Data Output for transmitting Digital Audio Data (DACDAT)
  • SCKx: Serial Clock, also known as the Bit Clock (BCLK)
  • SSx: Left/Right Channel Clock (LRCK)

BCLK provides the clock required to drive the data out or into the module, while LRCK provides the synchronization of the frame based on the Protocol mode selected.

In some codecs, Serial Clock (SCK) refers to the Baud/Bit Clock (BCLK). Throughout this section, the signal, SSx, is to be referred to as LRCK to be consistent with codec naming conventions. The SPI module has the ability to function in Audio Protocol Host and Audio Protocol Client modes. In Host mode, the module generates both the BCLK on the SCKx pin and the LRCK on the SSx pin. In certain devices, while in Client mode, the module receives these two clocks from its I2S partner, which is operating in Host mode.

While in Host mode, the SPI module has the ability to generate its own clock internally through the Host Clock (MCLK) from various internal sources, such as the primary clock, PBCLK, USB clock, FRC and other internal sources. In addition, the SPI module has the ability to provide the MCLK to the codec device, which is a common requirement.

To start the Audio Protocol mode, first disable the peripheral by setting the ON bit (SPIxCON1[15]) = 0. Next, set the AUDEN bit (SPIxCON1[31]) = 1 and then re-enable the peripheral by setting the ON bit = 1.

When configured in Host mode, the leading edge of SCKx and the LRCK is driven out within one SCKx period of starting the audio protocol. Serial data is shifted in or out with timing determined by the Protocol mode set by the AUDMOD[1:0] bits (SPIxCON1[25:24]). If the transmit FIFO is empty, zeros are transmitted.

In Client mode, the peripheral drives zeros out of SDOx but does not transmit the contents of the transmit FIFO until it sees the leading edge of the LRCK, after which time it starts receiving data (provided SDIx has not been disabled). It will continue to transmit zeros as long as the transmit FIFO is empty.

While in Client or Host mode, the SPI module does not generate an underrun on the TX FIFO after start-up. This allows software to set up the SPI, set up the DMA, turn on the SPI module’s audio protocol and then turn on the DMA without getting an error.

After the first write to the TX FIFO (SPIxBUF), the SPI enables underrun detection and generation. To keep the RX FIFO empty until the DMA is enabled, set DISSDI (SPIxCON1[4]) = 1. After enabling the DMA, set DISSDI = 0 to start receiving.