15.4.11 Enabling the ADC

The ADC module is enabled when the ON bit (ADnCON[15]) is set. The ON bit should be set only after the module has been configured. When the software sets the ON bit, the hardware requires approximately five ADC clock cycles to begin operation. When the ADC module is enabled, the module will perform an offset calibration cycle (~5,000 ADC clocks). The ADRDY bit (ADnCON[31]) is set by hardware when the ADC is ready for operation.

If the ON bit is cleared (after having been set), all status and ready bits are automatically cleared. The control bits and the result register’s contents remain unaffected since it was last programmed/updated.

The ADC can be in one of three operation states indicated by the OMODE[1:0] bits (ADnCON[25:24]):

• Off (OMODE[1:0] = ‘00’): When power of the converter is switched off.
• Standby (OMODE[1:0] = ‘01’): When the module is in a power-saving mode.
• Run (OMODE[1:0] = ‘1X’): When the module is active and ready to convert.