31.3.4.1 Clearing Pre-DMT Event

Clearing the DMT counter value requires a special sequence of operations:

1. The STEP1[15:8] bits in the DMTPRECLR register must be written as ‘01000000’ (0x40).
2. The STEP2[7:0] bits in the DMTCLR register must be written as ‘00001000’ (0x08). This can only be done if preceded by Step 1 and the DMT is in the open window interval (WINOPN = 1).

Once these values are written, the DMT counter will be cleared to zero. The DMTPRECLR, DMTCLR and DMTSTAT registers’ values will also be cleared to zero. Refer to the pseudocode in Clearing DMT Before DMT Count Match Occurs for the correct sequence of operation. This is the normal use of the module while clearing the DMT.

If any value other than 0x40 is written to the STEP1 bits, the BAD1 bit in the DMTSTAT register will be set and it causes a DMT event to occur. Any value other than 0x08 written to the STEP2 bits will cause the BAD2 bit to be set in the DMTSTAT register. Also, if Step 2 is not preceded by Step 1, or Step 2 is not carried out in the open window interval, it causes the BAD2 flag to be set. Immediately, a DMT event will occur.

//Assume PSCNT = 0x0000FFFF and PSINTV = 0x000000FF
//When DMTCNT >= PSINTV WINOPN gets set

DMTPRECLR=0b01000000;            // Valid DMTPRECLR Value 
while(DMTSTAT & 0x0001!=0x0001); //Wait till DMT Clear Window is open 
                                   i.e WINOPN=1
DMTCLR=0b00001000;               // Valid DMTCLR Value