Jump to main content
31.2 Register Summary Offset Name Bit Pos. 7 6 5 4 3 2 1 0 0x3A00 DMTCON 31:24 23:16 15:8 ON 7:0 0x3A04 DMTPRECLR 31:24 23:16 15:8 STEP1[7:0] 7:0 0x3A08 DMTCLR 31:24 23:16 15:8 7:0 STEP2[7:0] 0x3A0C DMTSTAT 31:24 23:16 15:8 7:0 BAD1 BAD2 DMTEVENT WINOPN 0x3A10 DMTCNT 31:24 COUNTER[31:24] 23:16 COUNTER[23:16] 15:8 COUNTER[15:8] 7:0 COUNTER[7:0] 0x3A14 PSCNT 31:24 PSCNT[31:24] 23:16 PSCNT[23:16] 15:8 PSCNT[15:8] 7:0 PSCNT[7:0] 0x3A18 PSINTV 31:24 PSINTV[31:24] 23:16 PSINTV[23:16] 15:8 PSINTV[15:8] 7:0 PSINTV[7:0] 0x3A1C PPPC 31:24 23:16 15:8 NMISTEP1[7:0] 7:0 0x3A20 PPC 31:24 23:16 15:8 7:0 NMISTEP2[7:0]
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.