2.2 Address Buffers

The I²C module has two address buffer registers, I2CxADB0 and I2CxADB1, which can be used as receive buffers in Slave mode, transmit buffers in Master mode, or both transmit and receive buffers in Multi-Master mode (see table below). This differs from the MSSP module in that the MSSP module only used the SSPBUF to receive or transmit an address (or data). The address buffers are enabled via the Address Buffer Disable (ABD) bit. When ABD is clear (ABD = 0), the address buffers are enabled; when the ABD is set (ABD = 1), the address buffers are disabled.

In 7-bit Master mode, I2CxADB1 is used to store a slave address, while I2CxADB0 is unused. When the address buffers are enabled (the ABD bit of I2CxCON2 = 0), the address loaded into I2CxADB1 is copied into the transmit shift register automatically by hardware. Conversely, when the address buffers are disabled (ABD = 1), neither I2CxADB0 or I2CxADB1 are used, and the slave address is loaded into the I2CxTXB register by user software.

In 10-bit Master mode, I2CxADB0 is used to store the lower eight bits of the slave address, while I2CxADB1 is used to store the upper bits and R/W value of the slave address. When the address buffers are enabled (ABD = 0), the upper byte of the 10-bit address loaded into I2CxADB1 is copied automatically by the hardware into the transmit shift register. Once the master receives the ACK from the slave, the lower byte of the 10-bit address loaded into I2CxADB0 is copied automatically by the hardware into the transmit shift register.

In Multi-Master mode, only 7-bit addresses are used. If the device is addressed as a slave, the received matching slave address is copied into the I2CxADB0 register. If the device is communicating as a master, the contents of the I2CxADB1 register are copied into the transmit shift register to address the slave.