2 I2C Module Overview

The I2C module provides a synchronous serial interface between the microcontroller and other I2C compatible devices using the two-wire bus. The two signal connections, Serial Clock (SCL) and Serial Data (SDA), are bidirectional open-drain lines, each requiring pull-up resistors to the supply voltage. Pulling the line to ground is considered a logic ‘0’, while allowing the line to float is considered a logic ‘1’.

Important: Note that the voltage levels of the logic ‘0’ (low) and logic ‘1’ (high) are not fixed and are dependent on the bus supply voltage.

According to the I2C specification, a logic input low level is up to 30% of VDD (VIL ≤ 0.3 VDD), while a logic input high level is 70% to 100% of VDD (VIH ≥ 0.7 VDD). Some legacy devices may use the previously defined fixed levels of VIL = 1.5V and VIH = 3.0V, but all new I2C compatible devices require the use of the 30/70% specification.

All I2C communication is performed using an 8-bit data word and a 1-bit Acknowledge sequence. All transactions on the bus are initiated and terminated by the master device. Depending on the direction of the data being transferred, there are four main operations performed by the I2C module:

  • Master Transmit – master is transmitting data to a slave
  • Master Receive – master is receiving data from a slave
  • Slave Transmit – slave is transmitting data to a master
  • Slave Receive – slave is receiving data from a master

The I2C interface allows for a multi-master bus, meaning that there can be several master devices present on one bus. A master can select a slave device by transmitting an unique address on the bus. When the address matches a slave’s address, the slave responds with an Acknowledge sequence (ACK), and communication between the master and that slave can commence. All other devices connected to the bus must ignore any transactions not intended for them.